The present invention relates to a liquid crystal display (LCD) device and a method for manufacturing the same, and more particularly to an in-plane switching type or a lateral electric field type liquid crystal display device and the method for manufacturing the same.
A commonly used thin film transistor liquid crystal display device includes a substrate having a plurality of pixel electrodes, an opposite substrate having common electrodes, and a liquid crystal material therebetween. On one of the substrates, a plurality of switching elements, each of which is disposed in a pixel, are disposed to control electric fields which are imparted to the liquid crystal material. An example of switching elements is a metal oxide silicon transistor having a gate electrode, a source electrode, and a drain electrode. The gate electrode receives gate voltages from the gate lines that are arranged on the substrate in a transverse direction. The source electrode is connected to one of data lines crossing the gate lines, which are arranged in a longitudinal direction. The drain electrode extends to form one of the pixel electrodes. When the pixel electrodes and the common electrodes receive voltages by the operation of the corresponding switching elements, the molecules of the liquid crystal material change their orientations in response to the electric fields generated by the potential difference between the pixel electrodes and the common electrodes. The liquid crystal material of the LCD shields or passes light according to the alignment of the liquid crystal molecules to display images.
However, the conventional LCD has a narrow viewing angle which requires selective viewing directions. In order to obtain a wide viewing angle, in-plane switching (IPS) type LCDs are suggested. An example of an IPS LCD is disclosed in U.S. Pat. No. 5,907,379. The IPS LCD has pixel and common electrodes formed on only one substrate. As shown in FIG. 1, the pixel electrodes and the common electrodes are disposed alternately in a transverse direction in each pixel so that when the pixel and common electrodes are applied with voltages, a liquid crystal material can be arranged parallel to a substrate.
Referring now to FIG. 1, the pixel electrode aligned in a longitudinal direction has two pixel electrode bars 13 and 13xe2x80x2 every pixel. Two pixel electrode bars 13 and 13xe2x80x2 are parallel to common electrode bars 21, 21xe2x80x2 and 21xe2x80x3 of the common electrode 20, and each pixel electrode bar 13 or 13xe2x80x2 is arranged between two of the common electrode bars 21, 21xe2x80x2 and 21xe2x80x3. Upper ends of the pixel electrode bars 13 and 13xe2x80x2 are electrically connected to each other by an upper connecting member 15, whereas lower ends of the pixel electrode bars 13 and 13xe2x80x2 are electrically connected to each other by a lower connecting member 17. Thus, the upper connecting member 15 and the lower connecting member 17 along with two pixel electrode bars 13 and 13xe2x80x2 form a rectangular shape.
The common electrode 20 has three common electrode bars 21, 21xe2x80x2 and 21xe2x80x3 aligned in the longitudinal direction of each pixel. Upper portion and lower portion of the common electrode bars 21, 21xe2x80x2 and 21xe2x80x3 are interconnected respectively by upper common electrode line 23 and lower common electrode line 23xe2x80x2 to be electrically connected to each other. The common electrode 20 including upper common electrode line 23 and lower common electrode lines 23xe2x80x2 is extended in the entire pixel area as well as in each pixel, as shown in FIG. 2.
FIG. 2 shows an electric connecting layout of common electrodes 20 on a substrate of a conventional IPS LCD. The common electrodes 20 of the IPS LCD are arranged parallel to gate lines 40. It is noted that in FIG. 2, the common electrodes 20 are illustrated as lines, but each of them has a ladder shape having a plurality of common electrode bars 21,21xe2x80x2 and 21xe2x80x3 and common electrode lines 23 and 23xe2x80x2 connecting the common electrode bars 21, 21xe2x80x2 and 21xe2x80x3 in the transverse direction.
In order to make the common electrode bars 21,21xe2x80x2 and 21xe2x80x3 in each pixel to receive the same voltages, it is necessary to connect all common electrode bars 21, 21xe2x80x2 and 21xe2x80x3 in the longitudinal direction as well as in the transverse direction. For this purpose, a common shorting bar 31 or 33 is arranged parallel to data lines 50 in the longitudinal direction to be electrically connected with the common electrodes 20. Accordingly, even though the common shorting bars 31 or 33 supply only one end of each common electrode line or bar with common voltages, the common electrode 20 in each pixel also can be applied with the same common voltages as supplied to one end of each common electrode line or bar since the common electrode bars 21, 21xe2x80x2 and 21xe2x80x3 are interconnected by the common electrode lines 23 and 23xe2x80x2.
However, in case only one common shorting bar 31 or 33 is used, common voltages supplied to the common electrode bars 21,21xe2x80x2 and 21xe2x80x3 in pixels remote from the common shorting bar 31 or 33 are lower than the required voltages since each common electrode line 23 or 23xe2x80x2 has the line resistance. The voltage drop in pixels remote from the common shorting bar 31 or 33 causes a flicker or a crosstalk, and thereby results in a deteriorated image quality of the LCD.
To solve the problem, it can be considered to increase width of the common electrode lines. However, it may decrease an aperture ratio and require additional space to dispose the enlarged common electrode lines.
As another method to solve the problems, it can be also considered to dispose a common shorting bar every pixel row. However, an additional process for forming common shorting bars on a substrate may increase the product cost. Also, the aperture ratio still may be decreased and an additional space may be required for the enlarged common electrode lines.
To solve the above problems and supply effectively each common electrode with common voltage, a widely-used structure disposes common shorting bars 31 and 33 at both sides of a pixel area of the LCD, as shown in FIG. 2. However, since a large size and a high definition LCD may render a very large voltage difference between a center portion and a peripheral portion of the pixel area, such structure may also cause a flicker or a crosstalk due to the voltage instability, resulting in a deteriorated image quality of the LCD.
It is an object of the present invention to provide an in-plane switching type thin film transistor liquid crystal display device and a method for manufacturing the same that can effectively prevent common voltage drop at each pixel of a pixel area to improve the image quality of the LCD.
It is another object of the present invention to provide an in-plane switching type thin film transistor liquid crystal display device and a method for manufacturing the same that can improve the distribution of common voltages in a pixel area without an additional process and decrease in an aperture ratio
It is other object of the present invention to provide an in-plane switching type thin film transistor liquid crystal display device and a method for manufacturing the same that are adapted to use in a large size and a high definition LCD.
These and other objects are provided, according to the present invention, by an in-plane switching type liquid crystal display device comprising a substrate, a liquid crystal material layer, pixel electrodes, common electrodes, gate lines, and data lines. The liquid crystal display device has common electrode lines connecting common electrode bars in the transverse direction to supply common voltages thereto and common shorting bars arranged parallel to the data lines to be electrically connected to the common electrodes to supply common voltages thereto.
In a preferred embodiment of the invention, the liquid crystal display device includes a plurality of thin film transistors, each of which is disposed in a pixel, and three common shorting bars. The common shorting bars are disposed in a longitudinal direction respectively at a center portion and both sides of a pixel area to supply the common electrodes with common voltage. Preferably, data lines positioned at the left of the center-positioned common shorting bar are disposed respectively at the left of corresponding pixels positioned at the left of the center-positioned common shorting bar, and data lines positioned at the right of the center-positioned common shorting bar are disposed respectively at the right of corresponding pixels positioned at the right of the center-positioned common shorting bar in order to provide a space required to dispose the center-positioned common shorting bar. Thus, a center space formed by changing the position of the data lines allows the center-positioned common shorting bar to be easily arranged at the center of the pixel area without an additional space and decrease of an aperture ratio.
Also, it is preferable that the common shorting bars are formed of metal having a conductivity higher than that of a doped semiconductor layer and, if possible, wider. Preferably, both ends of the common shorting bars are connected respectively to common voltage pads of the source driving integrated circuit to reduce voltage drop due to the line resistance of the common shorting bar itself.
Also, each end of the center-positioned shorting bar can be connected to two common voltage pads of the source driving integrated circuit to increase a redundancy, thereby improving reliance of the LCD.
According to the present invention, the method for manufacturing a in-plane switching type thin film transistor liquid crystal display device comprises the steps of forming a first conductive layer on a substrate, forming gate lines and common electrode lines by patterning the first conductive layer, forming a gate insulating layer on the substrate on which the gate lines and common electrode lines are formed, forming a semiconductor layer on the substrate on which the gate insulating layer is formed, forming an active region by patterning the semiconductor layer, forming a second conductive layer on the substrate on which the active region is formed, forming a plurality of thin film transistors, each of which has a source and a drain electrode, pixel electrodes connected to the drain electrodes, and data lines connected to source electrodes by patterning the second conductive layer on the substrate, forming a protecting layer on the substrate on which the data lines are formed, forming contact holes to expose a center portion and both ends of each common electrode, forming a third conductive layer on the substrate on which the contact holes are formed, and forming common shorting bars parallel to the data lines at a center portion and both sides of a pixel area by patterning the third conductive layer. The common shorting bars are electrically connected to the center portion and both ends of each common electrode on which the contact holes are formed.
In the method of the present invention, the step of forming the active region further includes forming a doped semiconductor layer on the substrate on which the semiconductor layer is formed, and the doped semiconductor layer is patterned along with the semiconductor layer.
In addition, the step of forming the thin film transistors includes separating electrically the source electrodes from the drain electrodes by patterning the doped semiconductor layer along with the second conductive layer.
Also, the step of forming the data lines includes forming common shorting bars composed of the same material as the data lines at the center portion and both sides of the pixel area, the step of forming the contact holes includes exposing portions of each common shorting bar of the same material as the data lines with which the center portion and both ends of each common electrode are to be electrically connected, and the step of forming the common shorting bars by patterning the third conductive layer includes making the center portion and both ends of each common electrode to be connected to the portions of each common shorting bar of the same material as the data lines.